KiCAD Minimalist Hypercube Linux Server Computer

2018-07-19

• Open Sourced KiCAD files (and some important datasheets for R40 and related components) - R40_Hypercube_Linux_Computer_2018_07_18.tar.gz

• The Hypercube Linux Server Computer is slowly beginning to take shape
• A number of mistakes and errors discovered and rectified in the schematic.
• The layout can be begin soon on 6 layer PCB in KiCAD 5
• Below are important notes relating to layout and circuit design that get documented on the way so you too can follow the adventure with your own boards.
• We will be integrating it with the relay board https://hellosemi.com/hypercube/pmwiki.php?n=Main.HypercubeRelayArray to allow power to arrays of Hypercube Linux boards to be managed as well their reboot remotely
• Also it will help with making the Hyper Neural Network Supercomputer a reality - https://hellosemi.com/hypercube/pmwiki.php?n=Main.AIBoards

KiCAD based Linux ARM SoC boards are now under development. These boards are open sourced with more to come in the future. The plan is:

1. Create a verbatim copy of an existing open sourced board (BPi board in this case) that is based on Allwinner R40 SoC chip

Original KiCAD base files from which to derive server board R40_PCB_2018_04_12b.tar.gz

2. Make modifications to above board to make a custom minimalist server board

3. Layout simple board with RAM CPU and essentials to boot Linux

4. Layout the complete board and boot Linux on to it

Electronics Design Notes

1. R40 board RAM data pins do not follow D0..D7 ordering - it is based on wiring convenience
2. R40 RAM has DSQ DSQ- pins which are fed by 4 separate pairs SDQS0P SDQS0N, SDQS1P, SDQS1N etc, one for each chip
3. Most of the resistors and capacitors are 0402
4. All resistors should be 1%
5. Some high value capacitors are 0603 and 0805
6. Some 0R resistors are 0805
7. Global labels and net labels are used to connect tracks together
8. This design uses a lot of power supply labels
9. The CPU is split into 12 parts - when generating the schematic symbol, specify that the symbols are not interchangeable
10. Some clock wires have small capacitors (around 5pF) that can be inserted to correct clock skew
11. The ESD diodes for HDMI have pairs of wires on either side that are internally connected. The pads for some reason have been numbered consecutively (it need not be in KiCAD as pads with duplicate numbers can exist in KiCAD)
12. Many tracks around the PMIC has width restrictions
13. The main inductors around the PMIC are high current, low internal resistance 4x4mm SMD inductors
14. The SMD MOSFET Q1 has pads under the chip that need to be wired
15. The ESD diode has a + and - symbol to differentiate the two pins
16. There are SATA, HDMI, USB, MIPI DSI wires that have differential drive that requires length tuning to make it work correctly, and the wires need to be kept parallel and together to prevent noise and reflections.
17. The pull up resistor for the eMMC should be close to the eMMC pins to reduce the chance of picking up noise
18. The DDR address and data lines should be length tuned but it does not say that anywhere
19. Example SA0 (F6 on BGA) from Allwinner R40 goes to A0 (K3 on BGA) on all 4 DDR chips. The wiring for that would look something like the drawing below. Every path from the CPU to DDR is same length. The tolerance is about +/-0.3mm or better for GHz operation. The minimum trace widths are about 4 mils or about 0.1mm to get wires in and out of BGA pads of the R40 CPU. This makes them more expensive to fabricate than the usual 6 mil widths and clearances for normal PCB.

20. When calculating the length of tracks where layers are crossed, remember to take account of the layer thickness! If the PCB is 1mm thick, and there are 6 layers, then crossing each layer will cost 0.167mm. Sometimes it is best to list the tracks in a spreadsheet and keep a record of each length that has been added. Because it is the total that matters it is possible to get the cells to highlight themselves if the total lengths are not within spec.

21. When routing 0.1mm wires through BGA pads, the Allwinner R40 CPU pad spacing is 0.65 mm and routing is easy. However the BGA pads of the flash is 0.5mm and the BGA pads are too close to allow a 0.1mm wire to be routed through the gaps. In this instance, a limited number of unconnected BGA pad(s) such as P2 are removed from the footprint to gain access to the pads that are isolated.

Layer Organization

• Layer 1 = signal
• Layer 2 = GND plane
• Layer 3 = signal
• Layer 4 = signal
• Layer 5 = 3.3V power plane
• Layer 6 = signal

KiCAD Notes

To open the KiCAD file in a fresh install of the latest KiCAD, the home directory ~/.config/kicad has two files fp-lib-table and sym-lib-table that seems to be out of sync with the rest of the software installation.

This will manifest itself in a lot of files not being found when KiCAD library editor or PCB footprint editors are run.

To work around the problems, rename those two files to save them, and copy in the file same two files in /usr/share/kicad/template directory to the ~/.config/kicad directory and then restart KiCAD. You may still get one or more errors, but those are down to errors with specific libraries and can be ignored.

The paths to R40 related schematic symbols (and later the footprints) will be in relative subdirectory libs from the project file directory. Wherever possible relative paths are used so that projects don't break when transferred to a new desktop setup in a different PC.

Install KiCAD5 BOM Generating Tool

• KiCAD5 BOM is now working - https://github.com/SchrodingersGat/KiBoM
  • The software has be downloaded to PC and the PC must have ability to run Python (Linux this is built in)
  • Add the software to the Tools > Generate Bill of Materials.. dialog box (KiBOM_CLI) and run from there.
  • The file is generated in the project folder e.g. cpu_board_bom_.csv. Open the file with comma as the separator to get correct BOM for the board.
  • Manually edit the cells as needed. Alternatively, fix the issues in the Schematic and regenerate the BOM

Electronics Design Notes

• R40 board RAM data pins do not follow D0..D7 ordering - it is based on wiring convenience
• R40 RAM has DSQ DSQ- pins which are fed by 4 separate pairs SDQS0P SDQS0N, SDQS1P, SDQS1N etc, one for each chip
• Most of the resistors and capacitors are 0402
• All resistors should be 1%
• Some high value capacitors are 0603 and 0805
• Some 0R resistors are 0805
• Global labels and net labels are used to connect tracks together
• This design uses a lot of power supply labels
• The CPU is split into 12 parts - when generating the schematic symbol, specify that the symbols are not interchangeable
• Some clock wires have small capacitors (around 5pF) that can be inserted to correct clock skew
• The ESD diodes for HDMI have pairs of wires on either side that are internally connected.

• Many tracks around the PMIC has width restrictions
• The main inductors around the PMIC are high current, low internal resistance 4x4mm SMD inductors
• The SMD MOSFET Q1 has pads under the chip that need to be wired
• The ESD diode has a + and - symbol to differentiate the two pins
• There are SATA, HDMI, USB, MIPI DSI wires that have differential drive that requires length tuning to make it work correctly, and the wires need to be kept parallel and together to prevent noise and reflections.
• The pull up resistor for the eMMC should be close to the eMMC pins to reduce the chance of picking up noise
• The DDR address and data lines should be length tuned but it does not say that anywhere
• A mistake in KiCAD design entry has been made with power lines - GND has other lines connected to it.